This invention relates to a method of increasing the conductivity of transparent layers, in particular for use in the manufacture of pixellated devices such as active matrix liquid crystal displays. The invention also relates to the transistor substrate, known as the active plate, used in the manufacture of such displays.
A liquid crystal display typically comprises an active plate and a passive plate between which liquid crystal material is sandwiched. The active plate comprises an array of transistor switching devices, typically with one transistor associated with each pixel of the display. Each pixel is also associated with a pixel electrode on the active plate to which a signal is applied for controlling the brightness of the individual pixel. Liquid crystal displays may be arranged as transmissive or reflective devices.
FIG. 1 shows the electrical components which make up the pixels of one known example of active plate of an LCD. The pixels are arranged in rows and columns. The row conductor 10 of a pixel is connected to the gate of the-TFT 12, and the column electrode 14 is coupled to the source. The liquid crystal material provided over the pixel effectively defines a liquid crystal cell 16 which extends between the drain of the transistor 12 and a common ground plane 18. An optional pixel storage capacitor 20 is connected between the drain of the transistor 12 and the row conductor 10 associated with an adjacent row of pixels.
A large area of the active plate is at least partially transparent, and this is required because the display is typically illuminated by a back light. In conventional display devices, the pixel electrode must be transparent, whereas row and column conductors are formed as metallic opaque lines. Metallic layers, such as chromium, molybdenum, aluminium, alloys or multilayer structures , are used for the row and column conductors because of the high conductivity, which improves the device performance. The conductivity of the lines (usually the column lines) to which the pixel drive signals are applied is particularly important in large displays, because a sizeable voltage drop occurs over the length of the line, making it impossible to drive uniformly all pixels along the line (column).
A problem with the use of metallic column conductors is that separate deposition and lithographic procedures are required to form the column conductors and the pixel electrodes. The pixel electrodes must be transparent, and are typically formed from a transparent conductive oxide film. It is well known that the lithography steps in the manufacturing process are a major contributing factor to the expense of the manufacturing process. Each lithographic step can be considered to reduce the yield of the process, as well as increasing the cost.
The conventional manufacturing process for the active plate of an LCD is a five mask process. With reference to the bottom gate TFT LCD active plate shown in FIG. 2, the process steps, each requiring a separate mask definition, are:
(i) defining the gate 22 (which is part of the row conductor) over the substrate 21;
(ii) defining the amorphous silicon island (which overlies a gate dielectric 23 which covers the entire structure), comprising a lower intrinsic layer 24 and an upper doped contact layer 26;
(iii) defining the metallic source 28, drain 30 and column electrode 32;
(iv) defining a contact hole 34 in a passivation layer 36 which covers the entire substrate; and
(v) defining the transparent pixel electrode 38 which contacts the drain 10 through the hole 34.
The capacitor shown in FIG. 1 may simply be formed from the gate dielectric by providing an area of overlap of one pixel electrode with a portion of the row/gate conductor of the adjacent row.
There have been various proposals to reduce the number of lithography steps, and thereby the mask count, of the manufacture process in order to reduce cost and increase yield.
For example, it has been proposed to form the column conductors from the same transparent conductive oxide film as the pixel electrode, so that these components of the pixel structure can be deposited and patterned together. Additional measures can result in a two mask process, and this is explained with reference to the bottom gate TFT LCD active plate shown in FIG. 3. The process steps, each requiring a separate mask definition, are:
(i) defining the gate 22 (and row conductors); and
(ii) defining the transparent column electrode 32 (which also forms is the TFT source 28) and the pixel electrode 38 (which also forms the TFT drain 30).
The definition of the semiconductor island 24, 26 can be achieved by a self-aligned process using the gate 22, for example by using UV exposure through the substrate. Of course, the semiconductor could equally be formed with a third mask step (between steps (i) and (ii) above). In the periphery of the array, the gate dielectric 23 is etched away using a low-precision stage, to allow contact to the gate lines at the periphery of the display.
In this structure, the high resistivity of the transparent conductive oxide film used for the column lines prevents the use of the structure in large (TV-sized) displays or in higher resolution displays, for example above VGA.
For this reason, there are further proposals to treat the column conductor area of the layer to increase the conductivity, whilst not affecting the transparency of the pixel electrode. For example, the article xe2x80x9cConductivity Enhancement of Transparent Electrode by Side-Wall Copper Electroplatingxe2x80x9d, J. Liu et al, SID 93 Digest, page 554 discloses a method of enhancing the conductivity by electroplating a copper bus to the side of the metal oxide column line. The process involves an incomplete etching process to leave metal oxide residues which act as seeds for the copper growth. The process is complicated and difficult to control. In addition, the copper bus will surround the source and drain electrodes, and there is a risk of shorts between the source and drain resulting from fast lateral copper growth when forming the bus. The copper bus around the source and drain electrodes also influences the channel length of the TFT and therefore makes the TFT characteristics unpredictable.
WO 99/59024 discloses a method for enhancing the conductivity of a transparent electrode by providing patterned metallic layers adjacent to the transparent electrodes.
There is still a need for a simple process for increasing the conductivity of a transparent metal oxide layer, such as ITO, without increasing dramatically the complexity of the process. Such a process will find application in active matrix LCD manufacture, but will also be useful for other technologies where mask count reduction could be achieved if a transparent conductive layer could be made to be more conductive without losing the transparency. This may be of benefit for polymer LEDs and large area image sensors.
According to a first aspect of the invention, there is provided a method of increasing the conductivity of a transparent conductive layer, comprising:
depositing and patterning a photoresist layer into a configuration corresponding to the desired pattern of the transparent conductive layer; and
patterning the transparent conductor layer using the photoresist layer, wherein the edge regions of the photoresist layer are provided with a taper, the method further comprising the steps of:
partially etching the photoresist layer such that at least part of the edge regions are completely removed thereby exposing the underlying transparent conductor layer;
selectively plating the exposed parts of the transparent conductor layer with a metallic layer.
This method has a single patterning stage, but using partial etching of a tapered resist layer in order to expose a small edge region of the transparent layer for coating with a conductive layer (which can be opaque).
The tapered edge regions may be provided by a photoresist reflow technique. This does not need any masking steps, and can be achieved using a raised temperature baking process.
The step of selectively plating may comprise:
activating the exposed parts of the transparent conductive layer;
removing the partially etched photoresist layer;
performing electroless plating of the activated areas of the transparent conductive layer.
The removal of the photoresist can instead be after the plating operation.
The metallic layer preferably comprises copper or silver and the transparent conductor layer comprises a conductive oxide, for example ITO.
The increased conductivity transparent conductive layer can be used in liquid crystal display manufacture. For this purpose, according to a second aspect of the invention, there is provided a method of forming an active plate for a liquid crystal display, comprising:
depositing and patterning a gate conductor layer over an insulating substrate;
depositing a gate insulator layer over the patterned gate conductor layer;
depositing a silicon layer over the gate insulator layer;
depositing a transparent conductor layer over the silicon layer;
depositing and patterning a photoresist layer over the transparent layer having a configuration defining source and drain areas, pixel electrode areas and line conductor areas associated with the source or drain conductors; and
patterning the transparent conductor layer using the photoresist layer,
wherein edge regions of the photoresist layer are provided with a taper, the method further comprising:
partially etching the photoresist layer such that at least part of the edge regions are completely removed thereby exposing the underlying transparent conductor layer;
selectively plating the exposed parts of the transparent conductor layer with a metallic layer.
This method can enable a two mask process to be used, wherein the gate conductor is deposited and patterned with a first lithographic process and the photoresist layer is deposited and patterned with a second lithographic process, the silicon layer being self aligned to the gate conductor.
According to a third aspect of the invention, there is provided an active plate for a liquid crystal display, comprising:
a gate conductor layer, a gate insulator layer, and a silicon layer together defining pixel transistors;
a transparent conductor layer defining source and drain conductors for the pixel transistors and also defining column conductors each connected to one of the source and drain of an associated transistor, and also defining pixel electrodes; and
a metallic layer overlying edge regions of the transparent conductor layer.
The metallic layer overlying the edge regions is the result of the method of the invention.
Each pixel may be associated with at least two column conductors, each column conductor having a metallic layer overlying both edges, and the two column conductors being connected together by a bridging portion. This reduces further the resistance of the columns, without increasing the required thickness of the metallic layer. The bridging portion may be completely covered by the metallic layer.
Alternatively, each column conductor may comprise a grid configuration, with all edges of the grid having an overlying metallic layer.